"Verilog" meaning in All languages combined

See Verilog on Wiktionary

Proper name [English]

Head templates: {{en-proper noun}} Verilog
  1. (computer languages, hardware) A language used to design and model electronic circuits Wikipedia link: en:Verilog Categories (topical): Computer languages
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Download raw JSONL data for Verilog meaning in All languages combined (0.9kB)


This page is a part of the kaikki.org machine-readable All languages combined dictionary. This dictionary is based on structured data extracted on 2024-09-22 from the enwiktionary dump dated 2024-09-20 using wiktextract (af5c55c and 66545a6). The data shown on this site has been post-processed and various details (e.g., extra categories) removed, some information disambiguated, and additional data merged from other sources. See the raw data download page for the unprocessed wiktextract data.

If you use this data in academic research, please cite Tatu Ylonen: Wiktextract: Wiktionary as Machine-Readable Structured Data, Proceedings of the 13th Conference on Language Resources and Evaluation (LREC), pp. 1317-1325, Marseille, 20-25 June 2022. Linking to the relevant page(s) under https://kaikki.org would also be greatly appreciated.